%PDF-1.4 % 7 0 obj << /S /GoTo /D (section.1) >> endobj 10 0 obj (Introduction) endobj 11 0 obj << /S /GoTo /D (subsection.1.1) >> endobj 14 0 obj (Background: FPGA based predictive control) endobj 15 0 obj << /S /GoTo /D (subsection.1.2) >> endobj 18 0 obj (Summary) endobj 19 0 obj << /S /GoTo /D (section.2) >> endobj 22 0 obj (Predictive control problem) endobj 23 0 obj << /S /GoTo /D (section.3) >> endobj 26 0 obj (MPC controller architecture) endobj 27 0 obj << /S /GoTo /D (subsection.3.1) >> endobj 30 0 obj (Linear system builder) endobj 31 0 obj << /S /GoTo /D (subsection.3.2) >> endobj 34 0 obj (MINRES solver) endobj 35 0 obj << /S /GoTo /D (section.4) >> endobj 38 0 obj (Resource and power usage) endobj 39 0 obj << /S /GoTo /D (section.5) >> endobj 42 0 obj (Closed-Loop Simulation) endobj 43 0 obj << /S /GoTo /D (subsection.5.1) >> endobj 46 0 obj (Simulator and scenario) endobj 47 0 obj << /S /GoTo /D (subsection.5.2) >> endobj 50 0 obj (Control results) endobj 51 0 obj << /S /GoTo /D (subsection.5.3) >> endobj 54 0 obj (Computational load \(for one fixed horizon\)) endobj 55 0 obj << /S /GoTo /D (section.6) >> endobj 58 0 obj (Conclusions and Future Developments) endobj 59 0 obj << /S /GoTo /D (section*.1) >> endobj 62 0 obj (References) endobj 63 0 obj << /S /GoTo /D [64 0 R /Fit ] >> endobj 66 0 obj << /Length 5112 /Filter /FlateDecode >> stream xڅ[[F~ϯУT5bfOvl[q2e未